Ka-Shu Ko
Inventor
Stats
- 2 US patents issued
- 3 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 2 US Patents Issued
- 3 US Applications Filed
- 7 Total Citation Count
- Jan 8, 2024 Most Recent Filing
- Nov 15, 2005 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
QUALCOMM INCORPORATED | 2
| 2008
|
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. | 2
| 2005
|
Inventor Addresses
Address | Duration |
---|---|
San Ramon, CA | May 17, 07 - May 17, 07 |
San Ramon, CA, US | Jun 09, 09 - Mar 13, 25 |
Technology Profile
Technology | Matters | |
---|---|---|
G06F: | ELECTRIC DIGITAL DATA PROCESSING | 1 |
H03D: | DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER | 1 |
H03M: | CODING, DECODING OR CODE CONVERSION, IN GENERAL | 1 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
2025/0088,707 | 2025 | Systems and Methods for Decoding Multiple Symbols Per Clock Cycle | 0 |
7773004 | 2010 | CAVLC run-before decoding scheme | 2 |
2010/0007,533 | 2010 | CAVLC RUN-BEFORE DECODING SCHEME | 1 |
7545900 | 2009 | Low jitter and/or fast lock-in clock recovery circuit | 0 |
2007/0110,206 | 2007 | Low jitter and/or fast lock-in clock recovery circuit | 1 |
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