Michael Kerstan
Inventor
Stats
- 13 US patents issued
- 17 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 13 US Patents Issued
- 17 US Applications Filed
- 167 Total Citation Count
- Jul 27, 2022 Most Recent Filing
- May 25, 1999 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| PETER WOLTERS GMBH | 2
4 2 | 2007
2008 2009 |
| WACKER SILTRONIC GESELLSCHAFT FUR HALBLEITERMATERIALIEN AKTIENGESELLSCHAFT | 1
| 1999
|
| SILTRONIC AG | 2
1 2 2 2 7 4 | 2002
2005 2007 2009 2010 2011 2014 |
Inventor Addresses
| Address | Duration |
|---|---|
| Burghausen, DE | Mar 26, 02 - Nov 14, 24 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| B23P: | OTHER WORKING OF METAL; COMBINED OPERATIONS; UNIVERSAL MACHINE TOOLS | 1 |
| B24B: | MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING | 15 |
| B28D: | WORKING STONE OR STONE-LIKE MATERIALS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2024/0379,342 | 2024 | METHOD FOR GRINDING SEMICONDUCTOR WAFERS | 0 |
| 2023/0162,969 | 2023 | METHOD FOR GRINDING SEMICONDUCTOR WAFERS | 0 |
| 10707069 | 2020 | Method for polishing a semiconductor wafer | 0 |
| 9539695 | 2017 | Carrier, method for coating a carrier, and method for the simultaneous double-side material-removing machining of semiconductor wafers | 2 |
| 9011209 | 2015 | Method and apparatus for trimming the working layers of a double-side grinding apparatus | 1 |
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