Phani Kumar Kandula
Inventor
Stats
- 3 US patents issued
- 17 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 3 US Patents Issued
- 17 US Applications Filed
- 108 Total Citation Count
- Sep 12, 2024 Most Recent Filing
- Dec 14, 2012 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
INTEL CORPORATION | 2
4 2 | 2012
2014 2015 |
Inventor Addresses
Address | Duration |
---|---|
Bangalore, IN | Jun 19, 14 - Nov 05, 24 |
Hillsboro, OR, US | Mar 31, 22 - Mar 06, 25 |
Murugeshpalya, IN | Mar 30, 23 - Mar 18, 25 |
Technology Profile
Technology | Matters | |
---|---|---|
G05B: | CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS | 1 |
G05D: | SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES | 1 |
G05F: | SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES | 1 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
12253901 | 2025 | Systems and methods for stable and elevated idle-mode temperature for assembled semiconductor devices | 0 |
2025/0076,954 | 2025 | HIERARCHICAL POWER MANAGEMENT APPARATUS AND METHOD | 0 |
12135569 | 2024 | Methods and apparatus to reduce thermal fluctuations in semiconductor processors | 0 |
12093100 | 2024 | Hierarchical power management apparatus and method | 1 |
2023/0113,953 | 2023 | DYNAMIC VOLTAGE AND FREQUENCY SCALING FOR DISCRETE GRAPHICS SYSTEMS | 1 |
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