Yu-Wei Jiang
Inventor
Stats
- 9 US patents issued
- 86 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 9 US Patents Issued
- 86 US Applications Filed
- 272 Total Citation Count
- Dec 18, 2024 Most Recent Filing
- Mar 22, 2010 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| MACRONIX INTERNATIONAL CO., LTD. | 2
5 2 | 2014
2015 2016 |
| NATIONAL TAIWAN UNIVERSITY | 2
6 | 2010
2012 |
Inventor Addresses
| Address | Duration |
|---|---|
| HSINCHU, TW | Nov 24, 16 - Mar 02, 23 |
| Hsinchu City, TW | Sep 17, 15 - May 13, 21 |
| Hsinchu, TW | Sep 22, 15 - Apr 10, 25 |
| New Taipei City, TW | Mar 14, 13 - Sep 19, 13 |
| New Taipei, TW | Jun 10, 14 - Aug 05, 14 |
| Taipei City, TW | Aug 26, 10 - Aug 26, 10 |
| Taipei, TW | Aug 14, 12 - Nov 14, 24 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| B82Y: | SPECIFIC USES OR APPLICATIONS OF NANO-STRUCTURES; MEASUREMENT OR ANALYSIS OF NANO-STRUCTURES; MANUFACTURE OR TREATMENT OF NANO-STRUCTURES | 1 |
| G03F: | PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR | 3 |
| G11C: | STATIC STORES | 12 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2025/0120,091 | 2025 | MEMORY ARRAY SOURCE/DRAIN ELECTRODE STRUCTURES | 0 |
| 12218250 | 2025 | Oxide semiconductor transistor structure in 3-d device and methods for forming the same | 0 |
| 12219777 | 2025 | Memory array source/drain electrode structures | 0 |
| 12185531 | 2024 | 3D NOR type memory array with wider source/drain conductive lines | 0 |
| 2024/0389,333 | 2024 | MEMORY DEVICE AND METHOD FOR MAKING SAME | 0 |
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