Po-Kai Hsiao
Inventor
Stats
- 1 US patents issued
- 10 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 1 US Patents Issued
- 10 US Applications Filed
- 11 Total Citation Count
- Jul 29, 2024 Most Recent Filing
- Feb 26, 2016 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. | 2
| 2016
|
Inventor Addresses
Address | Duration |
---|---|
Changhua County, TW | Aug 31, 17 - Nov 21, 24 |
Yuanlin City, TW | Jul 21, 22 - Aug 15, 24 |
Yuanlin, TW | May 28, 24 - May 28, 24 |
Technology Profile
Technology | Matters | |
---|---|---|
H01L: | SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR | 10 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
2024/0387,274 | 2024 | INTERFACE TRAP CHARGE DENSITY REDUCTION | 0 |
12094757 | 2024 | Method for manufacturing semiconductor device with semiconductor capping layer | 0 |
2024/0274,465 | 2024 | Depositing and Oxidizing Silicon Liner for Forming Isolation Regions | 0 |
11996317 | 2024 | Methods for forming isolation regions by depositing and oxidizing a silicon liner | 0 |
2023/0378,261 | 2023 | Semiconductor Device and Method of Forming Same | 3 |
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