Dhiraj Goswami
Inventor
Stats
- 15 US patents issued
- 24 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 15 US Patents Issued
- 24 US Applications Filed
- 252 Total Citation Count
- Jun 30, 2020 Most Recent Filing
- Mar 31, 1999 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
INTEL CORPORATION | 3
1 | 2002
2004 |
SYNOPSYS, INC. | 1
4 2 6 2 3 4 1 | 1999
2009 2010 2011 2012 2013 2014 2015 |
MENTOR GRAPHICS CORPORATION | 2
2 | 2006
2009 |
Inventor Addresses
Address | Duration |
---|---|
28592 SW. Morningside Ave. | Jun 30, 09 - Jun 30, 09 |
Austin, TX | Oct 14, 04 - Apr 25, 06 |
Austin, TX, US | Apr 01, 04 - Apr 01, 04 |
Mountain View, CA | Oct 30, 01 - Oct 02, 03 |
Wilsonville, CA, US | Mar 06, 14 - Oct 11, 22 |
Wilsonville, OR | Jan 11, 07 - Jan 11, 07 |
Wilsonville, OR, US | Dec 31, 09 - Dec 26, 23 |
Technology Profile
Technology | Matters | |
---|---|---|
G01R: | MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES | 5 |
G06F: | ELECTRIC DIGITAL DATA PROCESSING | 22 |
G06N: | COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS | 2 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
11853668 | 2023 | FPGA implementation interleaved with FPGA overlay architectures for emulation | 0 |
11687831 | 2023 | Method, product, and apparatus for a multidimensional processing array for hardware acceleration of convolutional neural network inference | 0 |
11676068 | 2023 | Method, product, and apparatus for a machine learning process leveraging input sparsity on a pixel by pixel basis | 0 |
11468218 | 2022 | Information theoretic subgraph caching | 0 |
10762262 | 2020 | Multi-dimensional constraint solver using modified relaxation process | 3 |
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