Rohit Kumar Gupta
Inventor
Stats
- 8 US patents issued
- 22 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 8 US Patents Issued
- 22 US Applications Filed
- 108 Total Citation Count
- May 16, 2024 Most Recent Filing
- Oct 20, 2006 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| STMicroelectronics STM | 1
| 2011
|
| STMICROELECTRONICS, INC. | 2
| 2011
|
| STMicroelectronics S.A. | 2
| 2011
|
| TATA CONSULTANCY SERVICES LIMITED | 2
2 2 | 2011
2012 2013 |
| GENERAL ELECTRIC COMPANY | 4
| 2014
|
| NVIDIA CORPORATION | 3
| 2006
|
| HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. | 1
| 2008
|
Inventor Addresses
| Address | Duration |
|---|---|
| Bangalore, IN | Jul 30, 15 - Aug 25, 20 |
| Bengaluru, IN | Jul 01, 21 - Jul 01, 21 |
| Gurgaon, IN | Apr 12, 18 - Apr 12, 18 |
| Heidelberg, DE | Nov 19, 20 - Oct 22, 24 |
| Kolkata, IN | Nov 15, 12 - Apr 04, 17 |
| Noida, IN | Mar 02, 23 - Nov 28, 24 |
| Punjab, IN | May 31, 12 - Feb 24, 15 |
| Santa Clara, CA | Mar 01, 07 - Mar 01, 07 |
| Santa Clara, CA, US | Apr 12, 11 - Jun 12, 12 |
| Singapore, SG | Oct 28, 10 - Oct 28, 10 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| A63F: | CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; GAMES NOT OTHERWISE PROVIDED FOR | 1 |
| B41J: | TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS | 1 |
| D06M: | TREATMENT, NOT PROVIDED FOR ELSEWHERE IN CLASS D06, OF FIBRES, THREADS, YARNS, FABRICS, FEATHERS, OR FIBROUS GOODS MADE FROM SUCH MATERIALS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2024/0396,535 | 2024 | SINGLE PIN CLOCK-FREE RETENTION FLIP-FLOP | 0 |
| 12136917 | 2024 | Voltage level shifter for sub-threshold operation | 0 |
| 12125075 | 2024 | Classification of dangerous goods via machine learning | 0 |
| 2024/0266,343 | 2024 | STANDARD CELL LAYOUT METHODOLOGY FOR LOW LEAKAGE SOLUTIONS | 0 |
| 2024/0213,153 | 2024 | ELECTRONIC DEVICE WITH A CELL OF TRANSISTORS | 0 |
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