Mohammed A Fathimulla
Inventor
Stats
- 9 US patents issued
- 13 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 9 US Patents Issued
- 13 US Applications Filed
- 480 Total Citation Count
- Dec 9, 2004 Most Recent Filing
- Dec 20, 1985 Earliest Filing
Work History
Patent Owner | Applications Filed | Year |
---|---|---|
ALLIED-SIGNAL INC. | 1
1 1 | 1985
1987 1991 |
AlliedSignal Inc. | 1
3 1 | 1992
1997 2000 |
HONEYWELL INTERNATIONAL INC. | 4
3 | 2002
2004 |
Inventor Addresses
Address | Duration |
---|---|
Columbia, MD | May 12, 87 - Sep 06, 88 |
Ellicott City, MD | Nov 24, 92 - Jan 30, 07 |
Ellicott City, MD, US | Jul 25, 02 - Jan 01, 04 |
Ellieott City, MD | Sep 19, 00 - Sep 19, 00 |
Technology Profile
Technology | Matters | |
---|---|---|
B44C: | PRODUCING DECORATIVE EFFECTS | 1 |
C03C: | CHEMICAL COMPOSITION OF GLASSES, GLAZES, OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS | 2 |
C09K: | MATERIALS FOR APPLICATIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR | 1 |
Patents / Publication
Patents / Publication # | Year of Publication / Issued | Title | Citations |
---|---|---|---|
7169679 | 2007 | Varactor with improved tuning range | 3 |
2006/0125,012 | 2006 | Varactor | 11 |
2006/0124,975 | 2006 | Dual work function gate in CMOS device | 1 |
2006/0128,147 | 2006 | Method of fabricating electrically conducting vias in a silicon wafer | 0 |
2004/0159,908 | 2004 | Silicon-on-insulator wafer for RF integrated circuit | 5 |
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