Burcin Serter Ergun
Inventor
Stats
- 1 US patents issued
- 3 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 1 US Patents Issued
- 3 US Applications Filed
- 9 Total Citation Count
- Dec 12, 2023 Most Recent Filing
- Jun 9, 2008 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| SYNAPTICS INCORPORATED | 2
| 2008
|
Inventor Addresses
| Address | Duration |
|---|---|
| Poway, CA, US | Jun 01, 23 - Mar 18, 25 |
| San Diego, CA, US | May 07, 09 - May 04, 10 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| H03D: | DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER | 1 |
| H03L: | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES | 2 |
| H03M: | CODING, DECODING OR CODE CONVERSION, IN GENERAL | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 12255661 | 2025 | Early lock detection for phase locked loops | 0 |
| 11764795 | 2023 | Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal | 0 |
| 2023/0170,911 | 2023 | FRACTIONAL PHASE LOCKED LOOP (PLL) WITH DIGITAL CONTROL DRIVEN BY CLOCK WITH HIGHER FREQUENCY THAN PLL FEEDBACK SIGNAL | 0 |
| 7710299 | 2010 | System and method providing channel multiplexing for analog-to-digital conversion | 2 |
| 2009/0115,651 | 2009 | System and method providing channel multiplexing for analog-to-digital conversion | 6 |
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