CHEN DROR
Inventor
Stats
- 1 US patents issued
- 4 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 1 US Patents Issued
- 4 US Applications Filed
- 33 Total Citation Count
- May 3, 2021 Most Recent Filing
- Mar 4, 2014 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| KLA-TENCOR CORPORATION | 2
1 | 2014
2017 |
Inventor Addresses
| Address | Duration |
|---|---|
| Tivon, IL | Jul 07, 16 - May 07, 24 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G01B: | MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS | 1 |
| G03F: | PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR | 3 |
| G05B: | CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 11978679 | 2024 | Substrate with cut semiconductor pieces having measurement test structures for semiconductor metrology | 0 |
| 11353799 | 2022 | System and method for error reduction for metrology measurements | 2 |
| 2022/0155,693 | 2022 | System and Method for Error Reduction for Metrology Measurements | 0 |
| 2021/0351,089 | 2021 | Substrate with Cut Semiconductor Pieces Having Measurement Test Structures for Semiconductor Metrology | 1 |
| 10387608 | 2019 | Metrology target identification, design and verification | 4 |
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