You-Hua Chou
Inventor
Stats
- 57 US patents issued
- 118 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 57 US Patents Issued
- 118 US Applications Filed
- 924 Total Citation Count
- Jun 26, 2024 Most Recent Filing
- Oct 3, 2003 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. | 1
4 2 2 6 16 21 15 21 11 6 2 | 2003
2004 2005 2006 2010 2011 2012 2013 2014 2015 2016 2017 |
Inventor Addresses
| Address | Duration |
|---|---|
| Hsin-Chu, TW | Dec 12, 13 - Nov 03, 20 |
| Hsinchu City, TW | Jan 30, 14 - Sep 05, 24 |
| Hsinchu, TW | Aug 05, 14 - Oct 17, 24 |
| Taipei City, TW | Aug 16, 07 - Jun 14, 18 |
| Taipei, TW | Aug 23, 05 - May 12, 20 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| B01D: | SEPARATION | 1 |
| B05C: | APPARATUS FOR APPLYING LIQUIDS OR OTHER FLUENT MATERIALS TO SURFACES, IN GENERAL | 2 |
| B05D: | PROCESSES FOR APPLYING LIQUIDS OR OTHER FLUENT MATERIALS TO SURFACES, IN GENERAL | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 2024/0347,388 | 2024 | SEMICONDUCTOR INTEGRATED CIRCUIT | 0 |
| 12109681 | 2024 | Substrate handling device and processing chamber | 0 |
| 2024/0329,533 | 2024 | SILVER PATTERNING AND INTERCONNECT PROCESSES | 0 |
| 2024/0297,038 | 2024 | DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF | 0 |
| 12027424 | 2024 | Semiconductor integrated circuit | 0 |
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