Harold Cheyne
Inventor
Stats
- 2 US patents issued
- 3 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 2 US Patents Issued
- 3 US Applications Filed
- 11 Total Citation Count
- Dec 12, 2014 Most Recent Filing
- Oct 18, 2012 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| CORNELL UNIVERSITY, CENTER FOR TECHNOLOGY LICENSING ("CTL") AT CORNELL UNIVERSITY | 2
3 | 2012
2014 |
| CORNELL UNIVERSITY | 2
2 | 2012
2014 |
| Cornell Univerrsity | 1
| 2012
|
Inventor Addresses
| Address | Duration |
|---|---|
| Trumansburg, NY, US | Apr 25, 13 - Nov 01, 16 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G05B: | CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS | 1 |
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 1 |
| H03B: | GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 9484855 | 2016 | System and methods for correcting clock synchronization errors | 8 |
| 2016/0019,023 | 2016 | LOW-POWER ACOUSTIC DATA ACQUISITION SYSTEM AND METHODS | 0 |
| 2015/0097,628 | 2015 | SYSTEM AND METHODS FOR CORRECTING CLOCK SYNCHRONIZATION ERRORS | 0 |
| 8933760 | 2015 | System and methods for correcting clock synchronization errors | 1 |
| 2013/0099,869 | 2013 | SYSTEM AND METHODS FOR CORRECTING CLOCK SYNCHRONIZATION ERRORS | 0 |
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