Olivier Burg
Inventor
Stats
- 8 US patents issued
- 10 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 8 US Patents Issued
- 10 US Applications Filed
- 120 Total Citation Count
- Jun 21, 2017 Most Recent Filing
- Nov 19, 2002 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| ST-ERICSSON SA, EN LIQUIDATION | 2
| 2007
|
| MARVELL INTERNATIONAL LTD. | 1
| 2015
|
| NXP B.V. | 2
| 2002
|
| MARVELL WORLD TRADE LTD. | 4
2 1 2 2 | 2012
2014 2015 2016 2017 |
| Marvell World Trade Ltd., St. Michael | 1
| 2012
|
Inventor Addresses
| Address | Duration |
|---|---|
| Caen, FR | Jul 24, 03 - Mar 20, 12 |
| Lausanne, CH | Aug 30, 12 - Apr 02, 19 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G04F: | TIME-INTERVAL MEASURING | 1 |
| G06F: | ELECTRIC DIGITAL DATA PROCESSING | 2 |
| G06G: | ANALOGUE COMPUTERS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 10250264 | 2019 | Multiplying delay-locked loop using sampling time-to-digital converter | 1 |
| 2017/0366,376 | 2017 | ANALOG FRACTIONAL-N PHASE-LOCKED LOOP | 20 |
| 2017/0366,191 | 2017 | MULTIPLYING DELAY-LOCKED LOOP USING SAMPLING TIME-TO-DIGITAL CONVERTER | 11 |
| 9740175 | 2017 | All-digital phase locked loop (ADPLL) including a digital-to-time converter (DTC) and a sampling time-to-digital converter (TDC) | 8 |
| 2017/0205,772 | 2017 | ALL-DIGITAL PHASE LOCKED LOOP (ADPLL) INCLUDING A DIGITAL-TO-TIME CONVERTER (DTC) AND A SAMPLING TIME-TO-DIGITAL CONVERTER (TDC) | 29 |
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