David Michael Bull
Inventor
Stats
- 47 US patents issued
- 62 US Applications filed
- most recent filing
This is official USPTO record data
Details
- 47 US Patents Issued
- 62 US Applications Filed
- 523 Total Citation Count
- Apr 26, 2022 Most Recent Filing
- Feb 19, 1999 Earliest Filing
Work History
| Patent Owner | Applications Filed | Year |
|---|---|---|
| THE REGENTS OF THE UNIVERSITY OF MICHIGAN | 6
2 2 2 2 | 2005
2006 2008 2009 2011 |
| ARM LIMITED | 3
1 4 1 9 8 2 12 12 4 16 3 7 2 1 5 | 1999
2001 2002 2003 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 |
Inventor Addresses
| Address | Duration |
|---|---|
| Balsham, GB | Jan 09, 01 - Jul 07, 15 |
| Cambridge, Cambridgeshire, GB | Jun 22, 17 - May 17, 18 |
| Cambridge, GB | Feb 20, 03 - Jul 23, 24 |
| Cambridgeshire, GB | Jul 17, 03 - Dec 21, 10 |
Technology Profile
| Technology | Matters | |
|---|---|---|
| G01M: | TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING STRUCTURES OR APPARATUS NOT OTHERWISE PROVIDED FOR | 1 |
| G01R: | MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES | 12 |
| G01V: | GEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS | 1 |
Patents / Publication
| Patents / Publication # | Year of Publication / Issued | Title | Citations |
|---|---|---|---|
| 12047083 | 2024 | Circuits and methods for set and reset signals | 0 |
| 11947460 | 2024 | Treating multiple cache lines as a merged cache line to store multiple blocks of data | 0 |
| 2023/0342,298 | 2023 | TREATING MULTIPLE CACHE LINES AS A MERGED CACHE LINE TO STORE MULTIPLE BLOCKS OF DATA | 1 |
| 2023/0136,561 | 2023 | Circuits and Methods for Set and Reset Signals | 1 |
| 11409532 | 2022 | Selecting instructions for a value predictor | 0 |
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