TESSERA, INC.

Patent Owner

Watch Compare Add to Portfolio

Stats

Details

Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 51699
 
  
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 10364
 
  
 
H01R ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS 4787
 
  
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 1380
 
  
 
G11C STATIC STORES 8143
 
  
 
H01K ELECTRIC INCANDESCENT LAMPS 814
 
  
 
B32B LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM7150
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 7152
 
  
 
B29C SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL; AFTER- TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING 4121
 
  
 
H01B CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING, OR DIELECTRIC PROPERTIES 470

Top Patents (by citation)

Upgrade to the Professional Level to View Top Patents for this Owner. Learn More

Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0025,967 FLIP-CHIP, FACE-UP AND FACE-DOWN CENTERBOND MEMORY WIREBOND ASSEMBLIESSep 26, 17Jan 25, 18[H01L]
2017/0309,593 Semiconductor chip assembly and method for making sameJul 07, 17Oct 26, 17[H01L, B23K, H05K]
2017/0263,540 STACKED CHIP-ON-BOARD MODULE WITH EDGE CONNECTORMay 26, 17Sep 14, 17[H01L, G11C]
2017/0207,141 Packaged microelectronic elements having blind vias for heat dissipationApr 03, 17Jul 20, 17[H01L]
2016/0233,165 ACTIVE CHIP ON CARRIER OR LAMINATED CHIP HAVING MICROELECTRONIC ELEMENT EMBEDDED THEREINApr 18, 16Aug 11, 16[H01L]
2015/0054,153 FLIP CHIP INTERCONNECTION WITH DOUBLE POSTNov 04, 14Feb 26, 15[H01L]
2002/0084,248 Wet etch process and composition for forming openings in a polymer substrateAug 01, 01Jul 04, 02[C23F]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9905502 Sintered conductive matrix material on wire bondSep 12, 16Feb 27, 18[H01L]
9899353 Off-chip vias in stacked chipsMay 29, 15Feb 20, 18[H01L]
9875955 Low cost hybrid high density packageNov 28, 16Jan 23, 18[H01L]
9859220 Laminated chip having microelectronic element embedded thereinApr 18, 16Jan 02, 18[H01L]
9847277 Staged via formation from both sides of chipJun 06, 16Dec 19, 17[H01L]
9812360 Systems and methods for producing flat surfaces in interconnect structuresDec 27, 16Nov 07, 17[H01L]
9806017 Flip-chip, face-up and face-down centerbond memory wirebond assembliesJan 05, 15Oct 31, 17[H01L]
9735093 Stacked chip-on-board module with edge connectorMar 04, 16Aug 15, 17[H01L, G11C]
9716075 Semiconductor chip assembly and method for making sameSep 11, 15Jul 25, 17[H01L, B23K, H05K]
9711401 Reliable packaging and interconnect structuresJun 28, 16Jul 18, 17[H01L]

View all patents..

Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2017/0098,621 ELECTRICAL BARRIER LAYERSAbandonedDec 15, 16Apr 06, 17[H01L, H05K]
2016/0254,247 Fan-out WLP with packageAbandonedMay 09, 16Sep 01, 16[H01L]
2015/0194,347 METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGESAbandonedMar 19, 15Jul 09, 15[H01L]
2015/0079,733 THREE-DIMENSIONAL SYSTEM-IN-A-PACKAGEAbandonedSep 22, 14Mar 19, 15[H01L]
8969133 Package-on-package assembly with wire bonds to encapsulation surfaceWithdrawnMar 11, 13Mar 03, 15[H01L]
2015/0043,181 ENHANCED STACKED MICROELECTRONIC ASSEMBLIES WITH CENTRAL CONTACTS AND IMPROVED GROUND OR POWER DISTRIBUTIONAbandonedOct 24, 14Feb 12, 15[H05K]
2014/0363,924 STACKED MULTI-DIE PACKAGES WITH IMPEDANCE CONTROLAbandonedAug 22, 14Dec 11, 14[H01L]
2014/0262,460 Connection Component with Posts and PadsAbandonedDec 10, 13Sep 18, 14[H01L]
2014/0145,329 FINE PITCH MICROCONTACTS AND METHOD FOR FORMING THEREOFAbandonedJan 30, 14May 29, 14[H01L]
2014/0124,565 MICROELECTRONIC ASSEMBLY WITH JOINED BOND ELEMENTS HAVING LOWERED INDUCTANCEAbandonedJan 14, 14May 08, 14[H01L]
2014/0057,370 DUAL WAFER SPIN COATINGAbandonedAug 19, 13Feb 27, 14[H01L]
2014/0042,634 METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGESAbandonedSep 24, 13Feb 13, 14[H01L]
2014/0027,931 STACK PACKAGES USING RECONSTITUTED WAFERSAbandonedSep 25, 13Jan 30, 14[H01L]
8624407 Microelectronic assembly with impedance controlled wirebond and reference wirebondExpiredAug 20, 12Jan 07, 14[H01L]
2013/0316,501 ULTRA-THIN NEAR-HERMETIC PACKAGE BASED ON RAINIERAbandonedJul 31, 13Nov 28, 13[H01L]
8575766 Microelectronic assembly with impedance controlled wirebond and conductive reference elementExpiredJan 07, 11Nov 05, 13[H01L]
8569884 Multiple die in a face down packageExpiredAug 15, 11Oct 29, 13[H01L]
8545599 Electrohydrodynamic device components employing solid solutionsExpiredOct 28, 10Oct 01, 13[B03C]
8513799 Method of electrically connecting a microelectronic componentExpiredApr 09, 09Aug 20, 13[H01L]
8508908 Electrohydrodynamic (EHD) fluid mover with field shaping feature at leading edge of collector electrodesExpiredDec 02, 11Aug 13, 13[H02H]

View all patents..

Top Inventors for This Owner

Upgrade to the Professional Level to View Top Inventors for this Owner. Learn More

We are sorry but your current selection exceeds the maximum number of comparisons () for this membership level. Upgrade to our Level for up to -1 comparisons!

We are sorry but your current selection exceeds the maximum number of portfolios (0) for this membership level. Upgrade to our Level for up to -1 portfolios!.