STATS CHIPPAC, INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
 
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 68294
 
 
 
B23K SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM 390
 
 
 
B23P OTHER WORKING OF METAL; COMBINED OPERATIONS; UNIVERSAL MACHINE TOOLS 155
 
 
 
B29C SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL; AFTER- TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING 1124
 
 
 
B31F MECHANICAL WORKING OR DEFORMATION OF PAPER OR CARDBOARD 124
 
 
 
B32B LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM1156
 
 
 
B65C LABELLING OR TAGGING MACHINES, APPARATUS, OR PROCESSES 119
 
 
 
B65G TRANSPORT OR STORAGE DEVICES, e.g. CONVEYERS FOR LOADING OR TIPPING; SHOP CONVEYER SYSTEMS; PNEUMATIC TUBE CONVEYERS 166
 
 
 
B65H HANDLING THIN OR FILAMENTARY MATERIAL, e.g. SHEETS, WEBS, CABLES178
 
 
 
B66C CRANES; LOAD-ENGAGING ELEMENTS OR DEVICES FOR CRANES, CAPSTANS, WINCHES, OR TACKLES 130

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Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
8970049 Multiple chip package module having inverted package stacked over dieDec 16, 04Mar 03, 15[H01L]
8623704 Adhesive/spacer island structure for multiple die packageSep 11, 06Jan 07, 14[H01L]
8552551 Adhesive/spacer island structure for stacking over wire bonded dieMay 20, 05Oct 08, 13[H01L]
8174119 Semiconductor package with embedded dieNov 10, 06May 08, 12[H01L]
8169064 Nested integrated circuit package on package systemAug 31, 07May 01, 12[H01L]
8143100 Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packagesAug 31, 07Mar 27, 12[H01L]
8129231 Method of manufacture for semiconductor package with flow controllerSep 21, 09Mar 06, 12[H01L]
8115301 Methods for manufacturing thermally enhanced flip-chip ball grid arraysNov 17, 06Feb 14, 12[H01L]
8106496 Semiconductor packaging system with stacking and method of manufacturing thereofJun 04, 07Jan 31, 12[H01L]
8067823 Chip scale package having flip chip interconnect on die paddleNov 15, 05Nov 29, 11[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2006/0138,649 Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) packageAbandonedJan 20, 06Jun 29, 06[H01L]

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