SAMSUNG SEMICONDUCTOR INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G11C STATIC STORES 6295
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 31331
 
  
 
G11B INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER 9129
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 7440
 
  
 
H03K PULSE TECHNIQUE 4127
 
  
 
H01F MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES 282
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 1158
 
  
 
G05F SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES 199
 
  
 
G06G ANALOGUE COMPUTERS 152
 
  
 
H01S DEVICES USING STIMULATED EMISSION191

Top Patents (by citation)

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Recent Publications

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9141473 Parallel memory error detection and correctionMar 22, 12Sep 22, 15[H03M, G06F]
9099181 Non-volatile static ram cell circuit and timing methodJan 21, 11Aug 04, 15[G11C]
8913350 Method and system for providing magnetic tunneling junction elements having improved performance through capping layer induced perpendicular anisotropy and memories using such magnetic elementsAug 10, 09Dec 16, 14[H01L, B82Y, G11B, G01R, H01F, G11C]
8891290 Method and system for providing inverted dual magnetic tunneling junction elementsMar 11, 11Nov 18, 14[H01L, G11C]
8825442 Probabilistic switching determination for electrical devicesSep 22, 10Sep 02, 14[G06F]
8723557 Multi-supply symmetric driver circuit and timing methodJun 03, 11May 13, 14[H03K]
8642358 Method for fabricating magnetic tunnel junction deviceDec 08, 11Feb 04, 14[H01L, G11C]
8625339 Multi-cell per memory-bit circuit and methodApr 11, 11Jan 07, 14[G11C]
8546151 Method for manufacturing magnetic storage device and magnetic storage deviceFeb 25, 08Oct 01, 13[H01L]
8546986 Stator connectorJan 14, 11Oct 01, 13[H02K]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
5654742 Method and apparatus for providing operations affecting a frame buffer without a row address strobe cycleExpiredMay 26, 95Aug 05, 97[G09G]
5539430 Pipelined read write operations in a high speed frame buffer systemExpiredOct 29, 93Jul 23, 96[G09G]
5528751 Frame buffer system designed for windowing operationsExpiredSep 07, 95Jun 18, 96[G06F]
5500818 Method and apparatus for providing accurate T(on) and T(off) times for the output of a memory arrayExpiredOct 29, 93Mar 19, 96[G11C]
5261076 Method for programming a pin compatible memory device by maintaining a reset clock signal longer than a regular reset durationExpiredDec 20, 89Nov 09, 93[G06F]
5187386 Low standby current intermediate DC voltage generatorExpiredJan 16, 91Feb 16, 93[H03K]
5166095 Low contact resistance processExpiredDec 14, 90Nov 24, 92[H01L]
5132556 Bandgap voltage reference using bipolar parasitic transistors and MOSFET's in the current sourceExpiredNov 17, 89Jul 21, 92[H03K, G06G]
5051691 Zero power dissipation laser fuse signature circuit for redundancy in vlsi designExpiredSep 13, 90Sep 24, 91[G06F, G01R]
5039875 CMOS power-on reset circuitExpiredNov 28, 89Aug 13, 91[H03K]
4991142 Dynamic random access memory with improved sensing and refreshingExpiredJul 20, 89Feb 05, 91[G11C]
4963771 TTL/CMOS level translatorExpiredSep 12, 89Oct 16, 90[H03K]
4939071 Method for forming low resistance, sub-micrometer semiconductor gate structuresExpiredMar 06, 84Jul 03, 90[G03C]

Top Inventors for This Owner

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