OPTIMALTEST LTD.
Patent Owner
Stats
- 14 US PATENTS IN FORCE
- 0 US APPLICATIONS PENDING
- Oct 28, 2014 most recent publication
Details
- 14 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 143 Total Citation Count
- Jul 06, 2005 Earliest Filing
- 1 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Top Patents (by citation)
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Recent Publications
- No Recent Publications to Display
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
8872538 Systems and methods for test time outlier detection and correction in integrated circuit testingMar 14, 13Oct 28, 14[G01R]
8421494 Systems and methods for test time outlier detection and correction in integrated circuit testingMay 23, 11Apr 16, 13[G01R]
8069130 Methods and systems for semiconductor testing using a testing scenario languageJun 29, 09Nov 29, 11[G06N, G06F]
7969174 Systems and methods for test time outlier detection and correction in integrated circuit testingApr 03, 09Jun 28, 11[G01R]
7777515 Methods and systems for semiconductor testing using reference diceDec 30, 08Aug 17, 10[G01R]
7737716 Methods and systems for semiconductor testing using reference diceDec 30, 08Jun 15, 10[G01R]
7679392 Methods and systems for semiconductor testing using reference diceDec 30, 08Mar 16, 10[G01R]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2012/0109,874 METHODS AND SYSTEMS FOR SEMICONDUCTOR TESTING USING A TESTING SCENARIO LANGUAGEAbandonedOct 18, 11May 03, 12[G06N, G06F]
Top Inventors for This Owner
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