DIABLO TECHNOLOGIES INC.

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 12435
 
  
 
G11C STATIC STORES 4147
 
  
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 4107
 
  
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 3282
 
  
 
H03D DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER 247
 
  
 
H03L AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES 278
 
  
 
H03K PULSE TECHNIQUE 1130
 
  
 
H04J MULTIPLEX COMMUNICATION 1124

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2016/0041,933 SYSTEM AND METHOD FOR IMPLEMENTING A MULTI-THREADED DEVICE DRIVER IN A COMPUTER SYSTEMAug 05, 14Feb 11, 16[G06F]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9779020 System and method for providing an address cache for memory map learningApr 29, 14Oct 03, 17[H03M, G06F]
9575908 System and method for unlocking additional functions of a moduleApr 29, 14Feb 21, 17[H03M, G06F]
9552175 System and method for providing a command buffer in a memory systemApr 29, 14Jan 24, 17[H04L, G09C, H03M, G06C, G06F]
9465557 Load reduction dual in-line memory module (LRDIMM) and method for programming the sameApr 20, 15Oct 11, 16[G06F, G11C]
9449651 System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipsetMar 20, 15Sep 20, 16[G11C]
9444495 System and method of interfacing co-processors and input/output devices via a main memory systemMar 02, 15Sep 13, 16[H04L, H03M, G06F]
9015408 Load reduction dual in-line memory module (LRDIMM) and method for programming the sameMay 05, 14Apr 21, 15[G06F, G11C]
8972805 System and method of interfacing co-processors and input/output devices via a main memory systemApr 07, 14Mar 03, 15[H04L, H03M, G06F]
8738853 Load reduction dual in-line memory module (LRDIMM) and method for programming the sameApr 30, 13May 27, 14[G06F]
8713379 System and method of interfacing co-processors and input/output devices via a main memory systemNov 22, 11Apr 29, 14[H03M, G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0371,204 SYSTEM AND METHOD FOR OFFSETTING THE DATA BUFFER LATENCY OF A DEVICE IMPLEMENTING A JEDEC STANDARD DDR-4 LRDIMM CHIPSETAbandonedAug 30, 16Dec 22, 16[G06F, G11C]
2016/0041,917 SYSTEM AND METHOD FOR MIRRORING A VOLATILE MEMORY OF A COMPUTER SYSTEMAbandonedAug 05, 14Feb 11, 16[G06F]
2015/0347,151 SYSTEM AND METHOD FOR BOOTING FROM A NON-VOLATILE MEMORYAbandonedMay 28, 14Dec 03, 15[G06F]
2015/0324,281 SYSTEM AND METHOD OF IMPLEMENTING AN OBJECT STORAGE DEVICE ON A COMPUTER MAIN MEMORY SYSTEMAbandonedMay 07, 14Nov 12, 15[G06F]
2015/0326,684 SYSTEM AND METHOD OF ACCESSING AND CONTROLLING A CO-PROCESSOR AND/OR INPUT/OUTPUT DEVICE VIA REMOTE DIRECT MEMORY ACCESSAbandonedMay 07, 14Nov 12, 15[H04L]
2015/0310,898 SYSTEM AND METHOD FOR PROVIDING A CONFIGURABLE TIMING CONTROL FOR A MEMORY SYSTEMAbandonedApr 23, 15Oct 29, 15[G11C]

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