CHIPBOND TECHNOLOGY CORPORATION

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 30332
 
  
 
H05K PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS 9147
 
  
 
H01F MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES 381
 
  
 
B32B LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM2155
 
  
 
G06K RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS 2196
 
  
 
A47G HOUSEHOLD OR TABLE EQUIPMENT 126
 
  
 
G03F PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR 1103

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2003/0203,209 System and method of laser sintering dies and dies sintered by laser sinteringMay 21, 03Oct 30, 03[B32B]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9653376 Heat dissipation package structureMay 24, 16May 16, 17[H01L]
9508676 Semiconductor package structure having hollow chamber and bottom substrate and package process thereofSep 09, 15Nov 29, 16[H01L]
9510441 Flexible substrateMar 10, 15Nov 29, 16[H05K]
9247635 Flexible substrateJun 27, 14Jan 26, 16[H05K]
9230823 Method of photoresist stripNov 03, 14Jan 05, 16[H01L]
9177830 Substrate with bump structure and manufacturing method thereofOct 31, 14Nov 03, 15[H01L]
9159660 Semiconductor package structure and method for making the sameOct 01, 13Oct 13, 15[H01L]
9059260 Semiconductor manufacturing method and semiconductor structure thereofJan 27, 14Jun 16, 15[H01L]
9000569 Semiconductor structureOct 01, 13Apr 07, 15[H01L]
8981536 Semiconductor structureOct 08, 13Mar 17, 15[H01L]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2016/0020,166 TRACE STRUCTURE OF FINE-PITCH PATTERNAbandonedOct 16, 14Jan 21, 16[H01L]
2014/0367,856 SEMICONDUCTOR MANUFACTURING PROCESS AND STRUCTURE THEREOFAbandonedSep 02, 14Dec 18, 14[H01L]
2014/0217,578 SEMICONDUCTOR PACKAGE PROCESS AND STRUCTURE THEREOFAbandonedMar 15, 13Aug 07, 14[H01L]
2014/0117,540 SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOFAbandonedJan 06, 14May 01, 14[H01L]
2014/0120,715 SEMICONDUCTOR MANUFACTURING METHOD, SEMICONDUCTOR STRUCTURE AND PACKAGE STRUCTURE THEREOFAbandonedJan 06, 14May 01, 14[H01L]
2014/0097,540 SEMICONDUCTOR STRUCTUREAbandonedNov 15, 12Apr 10, 14[H01L]
2014/0035,125 SEMICONDUCTOR MANUFACTURING METHOD, SEMICONDUCTOR STRUCTURE AND PACKAGE STRUCTURE THEREOFAbandonedJul 31, 12Feb 06, 14[H01L]
2014/0035,126 SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOFAbandonedJul 31, 12Feb 06, 14[H01L]
2013/0249,089 METHOD FOR MANUFACTURING FINE-PITCH BUMPS AND STRUCTURE THEREOFAbandonedMay 14, 13Sep 26, 13[H01L]
2013/0252,374 SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOFAbandonedMay 14, 13Sep 26, 13[H01L]
2013/0214,419 SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOFAbandonedFeb 16, 12Aug 22, 13[H01L]
2013/0193,570 BUMPING PROCESS AND STRUCTURE THEREOFAbandonedFeb 01, 12Aug 01, 13[H01L]
2013/0181,346 BUMPING PROCESS AND STRUCTURE THEREOFAbandonedJan 17, 13Jul 18, 13[H01L]
2013/0183,823 BUMPING PROCESSAbandonedJan 18, 12Jul 18, 13[H01L]
2010/0109,159 BUMPED CHIP WITH DISPLACEMENT OF GOLD BUMPSAbandonedOct 20, 09May 06, 10[H01L]
2002/0180,064 Metallized surface wafer level package structureAbandonedMar 28, 02Dec 05, 02[H01L]

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