CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
Patent Owner
Stats
- 40 US PATENTS IN FORCE
- 0 US APPLICATIONS PENDING
- May 06, 2003 most recent publication
Details
- 40 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 4,066 Total Citation Count
- Aug 01, 1991 Earliest Filing
- 71 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
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Top Patents (by citation)
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Recent Publications
- No Recent Publications to Display
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
6558739 Titanium nitride/titanium tungsten alloy composite barrier layer for integrated circuitsMay 30, 97May 06, 03[H01L, B05D]
6136693 Method for planarized interconnect vias using electroless plating and CMPOct 27, 97Oct 24, 00[C23C, H01L, B05D]
6117777 Chemical mechanical polish (CMP) endpoint detection by colorimetryJul 30, 97Sep 12, 00[H01L]
6001706 Method for making improved shallow trench isolation for semiconductor integrated circuitsDec 08, 97Dec 14, 99[H01L]
5994217 Post metallization stress relief annealing heat treatment for ARC TiN over aluminum layersDec 16, 96Nov 30, 99[H01L]
5948700 Method of planarization of an intermetal dielectric layer using chemical mechanical polishingMay 20, 96Sep 07, 99[H01L]
5946589 Elimination of void formation in aluminum based interconnect structuresOct 09, 97Aug 31, 99[H01L]
5923075 Definition of anti-fuse cell for programmable gate array applicationApr 08, 96Jul 13, 99[H01L]
5894059 Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effectMay 30, 97Apr 13, 99[H01L]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
6451706 Attenuation of reflecting lights by surface treatmentExpiredJun 03, 96Sep 17, 02[H01L, G03C]
6124215 Apparatus and method for planarization of spin-on materialsExpiredOct 06, 97Sep 26, 00[H01L]
6069069 Method for planarizing a low dielectric constant spin-on polymer using nitride etch stopExpiredDec 16, 96May 30, 00[H01L]
6063702 Global planarization method for inter level dielectric layers using IDL blocksExpiredJan 27, 97May 16, 00[H01L]
6054390 Grazing incident angle processing method for microelectronics layer fabricationExpiredNov 05, 97Apr 25, 00[H01L]
6037253 Method for increasing interconnect packing density in integrated circuitsExpiredJan 27, 97Mar 14, 00[H01L]
6010954 Cmos gate architecture for integration of salicide process in sub 0.1. .muM devicesExpiredSep 18, 98Jan 04, 00[H01L]
5970374 Method for forming contacts and vias with improved barrier metal step-coverageExpiredOct 18, 96Oct 19, 99[H01L]
5948701 Self-aligned contact (SAC) etching using polymer-building chemistryExpiredJul 30, 97Sep 07, 99[H01L]
5930627 Process improvements in self-aligned polysilicon MOSFET technology using silicon oxynitrideExpiredMay 05, 97Jul 27, 99[H01L]
5930677 Method for reducing microloading in an etchback of spin-on-glass or polymerExpiredApr 21, 97Jul 27, 99[H01L]
5897364 Method of forming N- and P-channel transistors with shallow junctionsExpiredJun 24, 96Apr 27, 99[H01L]
5858832 Method for forming a high areal capacitance planar capacitorExpiredMar 11, 96Jan 12, 99[H01L]
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