ARM LIMITED

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 116766
 
  
 
G11C STATIC STORES 20045
 
  
 
G06T IMAGE DATA PROCESSING OR GENERATION, IN GENERAL 12540
 
  
 
H03K PULSE TECHNIQUE 7067
 
  
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 67218
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 57103
 
  
 
G09G ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION 43108
 
  
 
H01L SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR 42320
 
  
 
H04N PICTORIAL COMMUNICATION, e.g. TELEVISION 34208
 
  
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 2982

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2018/0074,933 MANAGEMENT OF LOG DATA IN ELECTRONIC SYSTEMSAug 29, 17Mar 15, 18[G06F]
2018/0067,749 TRACING PROCESSING ACTIVITYSep 07, 16Mar 08, 18[G06F]
2018/0068,640 GRAPHICS PROCESSING SYSTEMS AND GRAPHICS PROCESSORSSep 01, 17Mar 08, 18[G09G, G06T, G06F]
2018/0060,475 METHOD FOR GENERATING THREE-DIMENSIONAL INTEGRATED CIRCUIT DESIGNAug 31, 16Mar 01, 18[G06F]
2018/0052,790 INTERCONNECT CIRCUITRY AND A METHOD OF OPERATING SUCH INTERCONNECT CIRCUITRYAug 19, 16Feb 22, 18[H04L, G06F]
2018/0046,459 DATA PROCESSINGAug 15, 16Feb 15, 18[G06F]
2018/0033,191 GRAPHICS PROCESSING SYSTEMSFeb 26, 16Feb 01, 18[G06T]
2018/0023,095 DATA LOGGING DEVICEJul 25, 16Jan 25, 18[C12N, G01N]
2018/0024,362 DATA PROCESSINGJul 21, 17Jan 25, 18[G06T, G02B, G01S]
2018/0026,799 A METHOD OF ESTABLISHING TRUST BETWEEN A DEVICE AND AN APPARATUSJan 25, 16Jan 25, 18[H04L]

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Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9922152 Computer implemented system and method for reducing failure in time soft errors of a circuit designMar 23, 16Mar 20, 18[G06F]
9922442 Graphics processing unit and method for performing tessellation operationsJul 18, 12Mar 20, 18[G06T]
9916130 Apparatus and method for vector processingDec 09, 14Mar 13, 18[H03M, G06F]
9916675 Graphics processing systemsMay 31, 13Mar 13, 18[G06T]
9916895 Memory write driver, method and systemOct 28, 16Mar 13, 18[G11C]
9911510 Redundancy schemes for memory cell repairOct 07, 16Mar 06, 18[G11C]
9912334 Method and circuit for detection of a fault eventMar 08, 17Mar 06, 18[H03K]
9912338 Apparatus and method for reduced latency signal synchronizationApr 07, 17Mar 06, 18[H03L, H03K]
9905295 Circuit and method for configurable impedance arrayMar 08, 17Feb 27, 18[H03M, G11C]
9906440 Arbitrating and multiplexing circuitryJun 09, 15Feb 27, 18[H04L, G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2017/0185,516 SNOOP OPTIMIZATION FOR MULTI-PORTED NODES OF A DATA PROCESSING SYSTEMAbandonedDec 28, 15Jun 29, 17[G06F]
2016/0154,452 SYSTEM AND METHOD FOR CONTROLLING THE POWER MODE OF OPERATION OF A MEMORY DEVICEAbandonedDec 02, 14Jun 02, 16[G06F]
2016/0155,147 SYSTEM AND METHOD FOR GENERATING BIDS FOR KEYWORDSAbandonedFeb 05, 16Jun 02, 16[G06Q]
2016/0098,555 PROGRAM CODE ATTESTATION CIRCUITRY, A DATA PROCESSING APPARATUS INCLUDING SUCH PROGRAM CODE ATTESTATION CIRCUITRY AND A PROGRAM ATTESTATION METHODAbandonedOct 02, 14Apr 07, 16[H04L, G06F]
2015/0370,955 METHOD FOR ADJUSTING A TIMING DERATE FOR STATIC TIMING ANALYSISAbandonedJun 18, 14Dec 24, 15[G06F]
2015/0186,142 MIXED SIZE DATA PROCESSING OPERATIONAbandonedMar 17, 15Jul 02, 15[G06F]
2015/0162,918 DIGITAL OUTPUT CLOCK GENERATIONAbandonedDec 05, 13Jun 11, 15[H03L]
2015/0154,045 CONTENTION MANAGEMENT FOR A HARDWARE TRANSACTIONAL MEMORYAbandonedFeb 10, 15Jun 04, 15[G06F]
2014/0365,751 OPERAND GENERATION IN AT LEAST ONE PROCESSING PIPELINEAbandonedMay 09, 14Dec 11, 14[G06F]
2014/0237,281 DATA PROCESSING SYSTEMAbandonedApr 30, 14Aug 21, 14[G06F]
2014/0125,392 LOW POWER LATCHING CIRCUITSAbandonedNov 05, 12May 08, 14[H03K]
2014/0115,554 METHOD OF GENERATING A LAYOUT OF AN INTEGRATED CIRCUIT COMPRISING BOTH STANDARD CELLS AND AT LEAST ONE MEMORY INSTANCEAbandonedDec 31, 13Apr 24, 14[G06F]
2014/0082,215 ARBITRATING BETWEEN DATA PATHS IN A BUFFERLESS FREE FLOWING INTERCONNECTAbandonedSep 19, 12Mar 20, 14[H04L]
2014/0068,371 INTEGRATED CIRCUIT WITH ERROR REPAIR AND FAULT TOLERANCEAbandonedNov 13, 13Mar 06, 14[G06F]
2014/0002,156 DUTY CYCLE CORRECTION WITHIN AN INTEGRATED CIRCUITAbandonedJun 27, 12Jan 02, 14[H03K]
8601167 Maintaining required ordering of transaction requests in interconnects using barriers and hazard checksExpiredOct 13, 10Dec 03, 13[G06F]
2013/0301,830 DEVICE, SYSTEM, AND METHOD OF SECURE ENTRY AND HANDLING OF PASSWORDSAbandonedJan 14, 13Nov 14, 13[H04L, G06F]
2013/0276,096 MANAGEMENT OF DATA PROCESSING SECURITY IN A SECONDARY PROCESSORAbandonedFeb 26, 13Oct 17, 13[G06F]
2013/0268,930 PERFORMANCE ISOLATION WITHIN DATA PROCESSING SYSTEMS SUPPORTING DISTRIBUTED MAINTENANCE OPERATIONSAbandonedApr 06, 12Oct 10, 13[G06F]
2013/0256,908 INTER-DIE CONNECTION WITHIN AN INTEGRATED CIRCUIT FORMED OF A STACK OF CIRCUIT DIESAbandonedDec 13, 10Oct 03, 13[H01L]

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