ARM FINANCE OVERSEAS LIMITED

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Patent Activity in the Last 10 Years

Technologies

Intl Class Technology Matters Rank in Class
 
  
 
G06F ELECTRIC DIGITAL DATA PROCESSING 243232
 
  
 
H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION 17268
 
  
 
G01R MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES 5154
 
  
 
H03K PULSE TECHNIQUE 4127
 
  
 
H04J MULTIPLEX COMMUNICATION 3122
 
  
 
G06T IMAGE DATA PROCESSING OR GENERATION, IN GENERAL 2133
 
  
 
H03M CODING, DECODING OR CODE CONVERSION, IN GENERAL 2109
 
  
 
G06G ANALOGUE COMPUTERS 152
 
  
 
G06J HYBRID COMPUTING ARRANGEMENTS 14
 
  
 
G06Q DATA PROCESSING SYSTEMS OR METHODS, SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORY OR FORECASTING PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORY OR FORECASTING PURPOSES, NOT OTHERWISE PROVIDED FOR 1173

Top Patents (by citation)

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Recent Publications

Publication # Title Filing Date Pub Date Intl Class
2017/0192,894 DATA CACHE VIRTUAL HINT WAY PREDICTION, AND APPLICATIONS THEREOFMar 23, 17Jul 06, 17[G06F]
2015/0154,677 COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITSFeb 09, 15Jun 04, 15[G06Q, G06F]
2015/0012,730 COMPACT LINKED-LIST-BASED MULTI-THREADED INSTRUCTION GRADUATION BUFFERSep 23, 14Jan 08, 15[G06F]

Recent Patents

Patent # Title Filing Date Issue Date Intl Class
9851975 Compact linked-list-based multi-threaded instruction graduation bufferSep 23, 14Dec 26, 17[G06F]
9817433 Apparatus and method for achieving glitch-free clock domain crossing signalsNov 21, 12Nov 14, 17[G06F]
9690579 Merged floating point operation using a modebitDec 29, 14Jun 27, 17[G06F]
9632939 Data cache virtual hint way prediction, and applications thereofJun 25, 15Apr 25, 17[G06F]
9519507 Executing an instruction of currently active thread before context switch upon receiving inactive context ID to be activatedMay 01, 15Dec 13, 16[G06F]
9274796 Variable register and immediate field encoding in an instruction set architectureMay 11, 09Mar 01, 16[G06F]
9223721 Embedded processor with virtualized security controls using guest identifications, a common kernel address space and operational permissionsSep 04, 12Dec 29, 15[G06F]
9218183 System and method for improving memory transferJan 05, 10Dec 22, 15[G06F]
9207958 Virtual machine coprocessor for accelerating software executionAug 08, 03Dec 08, 15[G06F]
9141545 Speculative read in a cache coherent microprocessorDec 02, 14Sep 22, 15[G06F]

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Expired/Abandoned/Withdrawn Patents

Patent # Title Status Filing Date Issue/Pub Date Intl Class
2013/0159,781 System For Compression Of Fixed Width Values In A Processor Hardware TraceAbandonedDec 16, 11Jun 20, 13[G06F]
2013/0067,284 Apparatus and Method for Low Overhead Correlation of Multi-Processor Trace InformationAbandonedSep 10, 12Mar 14, 13[G06F]
2013/0031,314 Support for Multiple Coherence DomainsAbandonedJan 30, 12Jan 31, 13[G06F]
2012/0331,265 Apparatus and Method for Accelerated Hardware Page Table WalkAbandonedJun 24, 11Dec 27, 12[G06F]
2012/0324,164 Programmable Memory AddressAbandonedJun 15, 11Dec 20, 12[G06F]
2012/0290,780 Multithreaded Operation of A Microprocessor CacheAbandonedJan 27, 12Nov 15, 12[G06F]
2012/0221,838 SOFTWARE PROGRAMMABLE HARDWARE STATE MACHINESAbandonedFeb 24, 12Aug 30, 12[G06F]
2012/0082,167 Method and Apparatus for Predicting Characteristics of Incoming Data Packets to Enable Speculative Processing to Reduce Processor LatencyAbandonedDec 12, 11Apr 05, 12[H04L]
2011/0055,497 Alignment and Ordering of Vector Elements for Single Instruction Multiple Data ProcessingAbandonedSep 03, 10Mar 03, 11[G06F]
2010/0312,991 Microprocessor with Compact Instruction Set ArchitectureAbandonedMar 26, 10Dec 09, 10[G06F]
2010/0306,513 Processor Core and Method for Managing Program Counter Redirection in an Out-of-Order Processor PipelineAbandonedJun 04, 10Dec 02, 10[G06F]
2010/0070,257 Methods, Systems, and Computer Program Products for Evaluating Electrical Circuits From Information Stored in Simulation Dump FilesAbandonedSep 12, 08Mar 18, 10[G06F]
2009/0282,220 Microprocessor with Compact Instruction Set ArchitectureAbandonedMay 08, 09Nov 12, 09[G06F]
2009/0271,592 Apparatus For Storing Instructions In A Multithreading MicroprocessorAbandonedApr 23, 09Oct 29, 09[G06F]
2009/0248,988 MECHANISM FOR MAINTAINING CONSISTENCY OF DATA WRITTEN BY IO DEVICESAbandonedMar 28, 08Oct 01, 09[G06F]
2009/0249,046 APPARATUS AND METHOD FOR LOW OVERHEAD CORRELATION OF MULTI-PROCESSOR TRACE INFORMATIONAbandonedMar 31, 08Oct 01, 09[G06F]
2009/0249,351 Round-Robin Apparatus and Instruction Dispatch Scheduler Employing Same For Use In Multithreading MicroprocessorAbandonedMar 23, 09Oct 01, 09[G06F]
2009/0187,739 Method and Apparatus for Improved Computer Load and Store OperationsAbandonedMar 26, 09Jul 23, 09[G06F]
2009/0132,841 Processor Accessing A Scratch Pad On-Demand To Reduce Power ConsumptionAbandonedJan 22, 09May 21, 09[G06F]
2009/0089,510 SPECULATIVE READ IN A CACHE COHERENT MICROPROCESSORAbandonedSep 28, 07Apr 02, 09[G06F]

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