ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
Patent Owner
Stats
- 559 US PATENTS IN FORCE
- 6 US APPLICATIONS PENDING
- Mar 06, 2018 most recent publication
Details
- 559 Issued Patents
- 0 Issued in last 3 years
- 0 Published in last 3 years
- 8,466 Total Citation Count
- Dec 20, 2002 Earliest Filing
- 20 Expired/Abandoned/Withdrawn Patents
Patent Activity in the Last 10 Years
Technologies
Intl Class
Technology
Matters
Rank in Class
Top Patents (by citation)
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Recent Publications
Publication #
Title
Filing Date
Pub Date
Intl Class
2017/0179,107 TRANSIENT VOLTAGE SUPPRESSOR (TVS) WITH REDUCED BREAKDOWN VOLTAGEFeb 28, 17Jun 22, 17[H01L]
2017/0069,740 TOPSIDE STRUCTURES FOR AN INSULATED GATE BIPOLAR TRANSISTOR (IGBT) DEVICE TO ACHIEVE IMPROVED DEVICE PERFOREMANCESMay 11, 13Mar 09, 17[H01L]
2016/0351,659 HIGH VOLTAGE FIELD BALANCE METAL OXIDE FIELD EFFECT TRANSISTOR (FBM)Aug 12, 16Dec 01, 16[H01L]
Recent Patents
Patent #
Title
Filing Date
Issue Date
Intl Class
9899931 Zero voltage switching flyback converter for primary switch turn-off transitionsOct 25, 16Feb 20, 18[H02M]
9882049 Self-aligned slotted accumulation-mode field effect transistor (AccuFET) structure and methodOct 06, 14Jan 30, 18[H01L]
9876072 Configurations and methods for manufacturing charged balanced devicesJun 14, 16Jan 23, 18[H01L]
Expired/Abandoned/Withdrawn Patents
Patent #
Title
Status
Filing Date
Issue/Pub Date
Intl Class
2016/0056,098 SEMICONDUCTOR DEVICE EMPLOYING ALUMINUM ALLOY LEAD-FRAME WITH ANODIZED ALUMINUMAbandonedMar 11, 14Feb 25, 16[H01L]
2015/0255,930 INTERFACES WITH BUILT-IN TRANSIENT VOLTAGE SUPPRESSIONAbandonedMar 04, 14Sep 10, 15[H01R, H02H, H05K]
2015/0076,676 POWER SEMICONDUCTOR DEVICE PACKAGE AND FABRICATION METHODAbandonedSep 17, 13Mar 19, 15[H01L]
2013/0224,919 METHOD FOR MAKING GATE-OXIDE WITH STEP-GRADED THICKNESS IN TRENCHED DMOS DEVICE FOR REDUCED GATE-TO-DRAIN CAPACITANCEAbandonedFeb 28, 12Aug 29, 13[H01L]
8471332 Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layoutExpiredJan 12, 12Jun 25, 13[H01L]
2013/0099,364 Top-side Cooled Semiconductor Package with Stacked Interconnection Plates and MethodAbandonedDec 11, 12Apr 25, 13[H01L]
2013/0069,154 SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICESAbandonedSep 20, 11Mar 21, 13[H01L]
2013/0069,157 SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICESAbandonedJun 30, 12Mar 21, 13[H01L]
2012/0142,165 Method of Avoiding Resin Outflow from the Wafer Scribe line in WLCSPAbandonedMar 10, 11Jun 07, 12[H01L]
2012/0007,206 Structures and methods for forming schottky diodes on a p-substrate or a bottomanode schottky diodeAbandonedAug 23, 11Jan 12, 12[H01L]
2011/0294,262 SEMICONDUCTOR PACKAGE PROCESS WITH IMPROVED DIE ATTACH METHOD FOR ULTRATHIN CHIPSAbandonedMay 29, 10Dec 01, 11[H01L]
2011/0068,457 Semiconductor package with adhesive material pre-printed on the lead frame and chip, and its manufacturing methodAbandonedSep 21, 09Mar 24, 11[H01L]
2011/0049,580 Hybrid Packaged Gate Controlled Semiconductor Switching Device Using GaN MESFETAbandonedAug 28, 09Mar 03, 11[H01L]
2010/0327,314 Insulated Gate Bipolar Transistor (IGBT) Collector Formed with Ge/A1 and Production MethodAbandonedJun 28, 09Dec 30, 10[H01L]
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